FXCH              Exchange Registers          Exception Flags: I

FXCH [destination]

       Logic:      T1 . ST(i)
                   ST(i) . ST
                   ST . T1


     FXCH exchanges the contents of ST with the contents of the
     destination register. If no destination is specified, ST is
     exchanged with ST(1).

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   Operands            Clocks         Bytes           Example
   FXCH register       10-15            3             FXCH ST(2)
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        Note:          Many coprocessor instructions only use ST. This
                       instruction provides an easy way of moving an operand
                       into ST, while saving ST's original contents.